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Type: R & D Name: Engineering on firmware after end
Number: 2 Sex: Unlimited
Education: Junior college and above Working area: Shenzhen
Resume language: Chinese,English Work Department: R&D
Working time: Undefined Release date: 2016-12-18
Deadline: 2018-12-02
Job description:

Post responsibilities:
1.He is responsible for firmware model designing and interface design of relevant models.
2. He is responsible for realizing, debugging and maintaining hardware designing.
3. He is responsible for a string of performance optimization work.
4. He is responsible for co-checking NFC functions with ASIC teams.
5. He is responsible for system debugging work.

Demands on skills
1.Familiar with NAND Flash memory and MLC/TLC/3DTLC. 
2.Familiar with NAND Flash performance optimization.
3. Familiar with NAND error model.
4. Familiar with BCH, LDPC algorithm.
 

Capacity requirements:
Others: