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Type: R & D Name: ASIC system engineering (SE)
Number: 2 Sex: Unlimited
Education: Bachelor degree or above Working area: Shenzhen
Resume language: Chinese,English Work Department: R&D
Working time: Undefined Release date: 2016-12-18
Deadline: 2018-12-02
Job description:

Requirements for recruitment
1. Master’s degree on majors of computer, integrated circuit or other electronics-related majors.
2.Over five years of experience on designing of large-scaled SoC structuring.
3. Experience on FW or SW development.
4.Familiar with using Verilog, C or other modelling language.
5. Deep understanding of Flash memory system.
 

Capacity requirements:
Others: