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Type: R & D Name: Digital designing and verification engineer
Number: 2 Sex: Unlimited
Education: Bachelor degree or above Working area: Shenzhen
Resume language: Chinese,English Work Department: R&D
Working time: More than 2 years Release date: 2016-12-18
Deadline: 2018-12-02
Job description:

Requirement for recruitment
1.Major in computer or other majors related with electronics.
2. Over three years of experience on designing and verification of digital circuit.
3. He should be familiar with using Verilog and UVM.
4. He should have abilities to independently design digital IP model.
2.1)NAND Flash Controller orientation
He should deeply comprehend operational model of 1X, 1Y, 3D NAND Flash.
2.2) PCLe/NVMe orientation
He should fully understand PCIe/NVMe protocol.
 

Capacity requirements:
Others: